MagnaChip to Offer Premium 0.18um Embedded BCD Process
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This new BCD process is fully compatible with standard CMOS processes and uses high density logic devices (1.8V) and high performance analog devices (5V) with industry-leading low flicker noise. This process will support premium features available on standard logic processes, including multiple time programmable memory (MTP), one time programmable memory (OTP), fuse-based trim capabilities, high K metal-insulator-metal capacitors, copper wire bonding compatibility, thick low-cost aluminum top metallization, and low-cost redistribution layer (RDL) process options.
High-performance 12V to 30V Lateral-DMOS power devices are fully isolated from the substrate and features low Rsp (specific on resistance) for the applications where power device area and efficiency are critical. The isolation of the high voltage devices from the substrate is achieved without the use of costly epitaxial layers and buried layers, and sacrificing latch-up performance while minimizing substrate injection.
"We are very pleased to offer our new 0.18um embedded BCD process solution with features that support 12~30V power applications while minimizing manufacturing processing costs," said
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