MagnaChip Unveils 0.13um Triple Gate Oxide CMOS Process for Wide Voltage, Mixed-Signal Applications
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This 0.13um triple gate oxide CMOS process features one additional layer of gate oxide introducing 1.8V CMOS into a standard 1.2/3.3V CMOS array on 0.13um technology. This process is fully compatible with the standard CMOS process and is designed to keep all device parameters unchanged within process variation ranges.
Using a modular characteristic for IC design provides added flexibility by allowing the selection of either 1.2/3.3V or 1.2/1.8/3.3V CMOS processes without the need for design reverification. The triple gate oxide process for 1.2/1.8/3.3V also allows for a reduction in chip size providing a more cost-effective manufacturing process through optimization and integration of various functional blocks into one compact chip. This is particularly useful for mobile device applications.
"We are very pleased to offer a 0.13um triple gate oxide CMOS process solution for wide voltage, mixed-signal applications," said
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